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MC33368 High Voltage GreenLineTM Power Factor Controller
The MC33368 is an active power factor controller that functions as a boost preconverter in off-line power supply applications. MC33368 is optimized for low power, high density power supplies requiring a minimum board area, reduced component count and low power dissipation. The narrow body SOIC package provides a small footprint. Integration of the high voltage startup saves approximately 0.7 W of power compared to resistor bootstrapped circuits. The MC33368 features a watchdog timer to initiate output switching, a one quadrant multiplier to force the line current to follow the instantaneous line voltage a zero current detector to ensure critical conduction operation, a transconductance error amplifier, a current sensing comparator, a 5.0 V reference, an undervoltage lockout (UVLO) circuit which monitors the VCC supply voltage and a CMOS driver for driving MOSFETs. The MC33368 also includes a programmable output switching frequency clamp. Protection features include an output overvoltage comparator to minimize overshoot, a restart delay timer and cycle-by-cycle current limiting. * Lossless Off-Line Startup * Output Overvoltage Comparator * Leading Edge Blanking (LEB) for Noise Immunity * Watchdog Timer to Initiate Switching * Restart Delay Timer
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16 DIP-16 P SUFFIX CASE 648 1 SO-16 D SUFFIX CASE 751K 1 A WL YY, Y WW 1 16 MC33368D AWLYWW MC33368P AWLYYWW
16
16
1 = Assembly Location = Wafer Lot = Year = Work Week
PIN CONNECTIONS
5.0 Vref Restart Delay Voltage FB Comp Mult Current Sense Zero Current AGnd 1 2 DIP-16 (Top View) 5.0 Vref Restart Delay Voltage FB Comp Mult Current Sense Zero Current AGnd 1 2 3 SO-16 (Top View) 4 5 6 7 8 13 Frequency Clamp 12 VCC 11 Gate 10 PGnd 9 LEB 16 Line 3 4 5 6 7 8 16 Line 15 N/C 14 N/C 13 Frequency Clamp 12 VCC 11 Gate 10 PGnd 9 LEB
ORDERING INFORMATION
Device MC33368D MC33368DR2 MC33368P Package SO-16 SO-16 DIP-16 Shipping 48 Units/Rail 2500 Tape & Reel 25 Units/Rail
(c) Semiconductor Components Industries, LLC, 2000
1
April, 2000 - Rev. 4
Publication Order Number: MC33368/D
MC33368
Representative Block Diagram
Line Restart Delay Restart Delay Output Overvoltage FB Comp Mult LEB Current Sense ZC Det Multiplier/ Error Amplifier Current Sense WatchdogTimer/ Zero Current Detector PWM S S R Q VCC UVLO Internal Bias Generator Vref AGnd Gate PGnd Frequency Clamp Frequency Clamp
This device contains 240 active transistors.
MAXIMUM RATINGS (TA = 25C, unless otherwise noted.)
Rating Power Supply Voltage (Transient) Symbol VCC VCC Value 20 16 Unit V V V V V
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Power Supply Voltage (Operating) Line Voltage VLine Vin1 Vin2 Iin Iin 500 Current Sense, Multiplier, Compensation, Voltage Feedback, Restart Delay and Zero Current Input Voltage LEB Input, Frequency Clamp Input Zero Current Detect Input Restart Diode Current -1.0 to +10 -1.0 to +20 5.0 5.0 mA mA Power Dissipation and Thermal Characteristics P Suffix, Plastic Package Case 648 Maximum Power Dissipation @ TA = 70C Thermal Resistance, Junction-to-Air Power Dissipation and Thermal Characteristics D Suffix, Plastic Package Case 751K Maximum Power Dissipation @ TA = 70C Thermal Resistance, Junction-to-Air Operating Junction Temperature Operating Ambient Temperature Storage Temperature Range PD RJA 1.25 100 mW C/W PD RJA TJ TA 450 178 150 mW C/W C C C -25 to +125 -55 to +150 Tstg NOTE: ESD data available upon request.
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FREQUENCY CLAMP CURRENT SENSE COMPARATOR ZERO CURRENT DETECTOR VOLTAGE REFERENCE MULTIPLIER OVERVOLTAGE COMPARATOR ERROR AMPLIFIER
ELECTRICAL CHARACTERISTICS (VCC = 14.5 V, for typical values TA = 25C, for min/max values TJ = -25 to +125C)
Output Source (VFB = 4.6 V, VComp = 3.0 V) Output Sink (VFB = 5.4 V, VComp = 3.0 V)
Frequency Clamp Disable Voltage
Frequency Clamp Capacitor Reset Current (VFC = 0.5 V)
Frequency Clamp Input Threshold
Delay to Output (VLEB = 12 V, VComp = 5.0 V, VMult = 5.0 V) (VCS = 0 to 5.0 V Step, CL = 1.0 nF)
Maximum Current Sense Input Threshold (VComp = 5.0 V, VMult = 5.0 V)
Input Offset Voltage (VMult = -0.2 V)
Input Bias Current (VCS = 0 to 2.0 V)
Delay to Output
Hysteresis (Vin Decreasing)
Input Threshold Voltage (Vin Increasing)
Reference Undervoltage Lockout Threshold
Maximum Output Current
Total Output Variation Over Line, Load and Temperature
Load Regulation (IO = 0 - 5.0 mA)
Line Regulation (VCC = 10 V to 16 V)
Voltage Reference (IO = 0 mA, TJ = 25C)
Multiplier Gain (VMult = 0.5 V, VComp = Vth(M) + 1.0 V)
Dynamic Input Voltage Range Multiplier Input Compensation
Input Threshold, VComp
Input Bias Current, VMult (VFB = 0 V)
Propagation Time to Output
Voltage Feedback Input Threshold
Transconductance (VComp = 3.0 V)
Input Offset Voltage (VComp = 3.0 V)
Input Bias Current (VFB = 5.0 V)
K
+
V
Mult
V
CS
V
-V th(M) Comp
Threshold
Characteristic
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MC33368
3 tPHL(in/out) VFB(OV) Vth(max) Regload Symbol Vth(FC) Regline VMult VComp VDFC Vth(M) Ireset Vref Vref VIO Tpd VIO Vth Vth VH gm TP IIB IIB IIB IO IO IO K 0 to 2.5 Vth(M) to (Vth(M) + 1.0) 1.07 VFB 4.95 0.25 Min 100 0.5 1.9 1.3 1.0 5.0 4.8 1.8 9.0 9.0 50 30 - - - - - - - - - - - 0 to 3.5 Vth(M) to (Vth(M) + 2.0) 1.084 VFB 0.51 -0.2 17.5 17.5 Typ 270 127 200 705 7.3 1.7 2.0 1.5 4.0 0.2 1.2 4.5 5.0 5.0 5.0 2.1 2.0 10 51 - 0 1.1 VFB 5.05 0.75 -1.0 Max 425 300 100 100 8.0 4.0 2.1 1.8 1.0 1.4 5.2 2.4 1.0 50 30 30 80 50 - - - - - - mho Unit mA mV mV mA mV mV mV A A A A ns ns ns V V V V V V V V V 1/V V
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TOTAL DEVICE TIMER UNDERVOLTAGE LOCKOUT LEADING EDGE BLANKING DRIVE OUTPUT
ELECTRICAL CHARACTERISTICS (continued) (VCC = 14.5 V, for typical values TA = 25C, for min/max values TJ = -25 to +125C)
Line Pin Leakage (VLine = 500 V)
VCC Dynamic Operating Current (50 kHz, CL = 1.0 nF) VCC Static Operating Current (IO = 0)
Line Operating Current (VCC = Vth(on), VLine = 50 V)
Line Startup Current (VCC = 0 V, VLine = 50 V)
Restart Pin Output Current (Vrestart = 0 V, Vref = 5.0 V)
Restart Timer Threshold
Watchdog Timer
Hysteresis
Minimum Operating Voltage After Turn-On (VCC Decreasing)
Startup Threshold (VCC Increasing)
Hysteresis (VLEB Decreasing)
Threshold (as Offset from VCC) (VLEB Increasing)
Input Bias Current
Output Voltage in Undervoltage (VCC = 7.0 V, ISink = 1.0 mA)
Output Voltage Fall Time (75% - 25%) (CL = 1.0 nF)
Output Voltage Rise Time (25% - 75%) (CL = 1.0 nF)
Source Resistance (Current Sense = 0 V, VGate = VCC - 1.0 V) Sink Resistance (Current Sense = 3.0 V, VGate = 1.0 V)
Characteristic
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MC33368
4 VShutdown Vth(restart) Symbol VO(UV) Vth(on) Irestart VLEB ROH ROL ILine tDLY Ibias ICC ISU VH VH tr tf IOP 11.5 Min 180 100 3.0 5.0 3.1 1.5 7.0 1.0 4.0 4.0 - - - - - - - - 12.9 2.25 0.01 385 270 Typ 5.3 3.0 5.2 2.3 4.5 8.5 0.1 8.6 7.2 16 13 70 55 30 Max 14.5 2.75 0.25 800 500 200 200 8.5 - 7.1 3.0 0.5 20 25 10 20 20 - 80 Unit mA mA mA mA mV A s ns ns V V V V V V A
MC33368
VCS, CURRENT SENSE PIN 6 THRESHOLD (V) VCS, CURRENT SENSE PIN 6 THRESHOLD (V)
1.6 1.4 1.2 1.0 0.8 0.6 0.4
VCC = 14 V TA = 25C
0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 -0.12 -0.06 0 0.06 0.12 = 2.25 V = 2.0 V 0.20 = 2.5 V VPin 4 = 4.0 V = 3.0 V = 2.75 V
VPin 4 = 4.0 V = 3.75 V = 3.5 V = 2.75 V = 3.0 V
= 3.25 V = 2.5 V = 2.25 V
0.2 = 2.0 V 0 -0.2 0.6 1.4 2.2 3.0
VM, MULTIPLIER PIN 5 INPUT VOLTAGE (V)
VM, MULTIPLIER PIN 5 INPUT VOLTAGE (V)
Figure 1. Current Sense Input Threshold versus Multiplier Input
VFB(OV), OVERVOLTAGE INPUT THRESHOLD (% VFB )
Figure 2. Current Sense Input Threshold versus Multiplier Input, Expanded View
VFB , VOLTAGE FEEDBACK THRESHOLD CHANGE (mV)
16 12 8.0 4.0 0
VCC = 14 V
110 VCC = 14 V 109
108
107
-4.0 -55
-25
0
25
50
75
100
125
106 -55
-25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 3. Reference Voltage versus Temperature
Figure 4. Overvoltage Comparator Input Threshold versus Temperature
100 g m, TRANSCONDUCTANCE ( mho) Phase 80 60 Transconductance 40 20 0 -20 10 VCC = 14 V VO = 2.0 to 4.0 V RL = 10 k TA = 25C 100 1.0 k 10 k 100 k 1.0 M
0 30 60 90 120 150 180 10 M , EXCESS PHASE (DEGREES)
6.0 V VCC = 14 V TA = 25C 4.0 V
2.0 V
0V
-1.0 V 5.0 s/DIV
f, FREQUENCY (Hz)
Figure 5. Error Amplifier Transconductance and Phase versus Frequency
Figure 6. Error Amplifier Transient Response
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MC33368
I chg, QUICKSTART CHARGE CURRENT (mA) t DLY, WATCHDOG TIME DELAY ( s)
Vchg, QUICKSTART CHARGE VOLTAGE (V)
1.80 VCC = 14 V 1.76 Voltage
1.50
500 VCC = 14 V
1.30
460
1.72
1.10
420
1.68
Current
0.90
380
1.64 -55
-25
0
25
50
75
100
0.70 125
340 -55
-25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 7. Quickstart Charge Current versus Temperature
Figure 8. Watchdog Timer Delay versus Temperature
20 OUTPUT VOLTAGE (V) 15 10 5.0 0 -5.0 5.0 s/DIV
6.0 I CC, SUPPLY CURRENT (mA) VCC = 14 V CL = 1000 pF TA = 25C Pulse tested with a 4.0 V peak, 50 kHz square wave through a 22 k resistance into Pin 7. 4.0
2.0
CO = 1000 pF Pin 3, 6, 8= Gnd Pin 5 = 1.0 k to Gnd TA = 25C
2.0 0
4.0
6.0
8.0
10
12
14
VCC, SUPPLY VOLTAGE (V)
Figure 9. Drive Output Waveform
Figure 10. Supply Current versus Supply Voltage
1000 R JA(t), THERMAL RESISTANCE JUNCTION-TO-AIR ( C/W) 400 OUTPUT VOLTAGE (V) Output Voltage 3.0 OUTPUT CURRENT (A)
200
2.0
100
0 Load Current
1.0
0 10 0.01 0.1 1.0 t, TIME (s) 10 100 200 ms/DIV
Figure 11. Transient Thermal Resistance
Figure 12. Low Load Detection Response Waveform
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MC33368
FUNCTIONAL DESCRIPTION
INTRODUCTION
With the goal of exceeding the requirements of legislation on line current harmonic content, there is an ever increasing demand for an economical method of obtaining a unity power factor. This data sheet describes a monolithic control IC that was specifically designed for power factor control with minimal external components. It offers the designer a simple cost effective solution to obtain the benefits of active power factor correction. Most electronic ballasts and switching power supplies use a bridge rectifier and a bulk storage capacitor to derive raw dc voltage from the utility ac line, Figure 13.
Rectifiers Converter
input circuits operate at a frequency much higher than that of the ac line, they are smaller, lighter in weight, and more efficient than a passive circuit that yields similar results. With proper control of the preconverter, almost any complex load can be made to appear resistive to the ac line, thus significantly reducing the harmonic current content.
Operating Description
The MC33368 contains many of the building blocks and protection features that are employed in modern high performance current mode power supply controllers. Referring to the block diagram in Figure 15, note that a multiplier has been added to the current sense loop and that this device does not contain an oscillator. A description of each of the functional blocks is given below.
Error Amplifier
AC Line
Bulk Storage Capacitor
Load
Figure 13. Uncorrected Power Factor Circuit
This simple rectifying circuit draws power from the line when the instantaneous ac voltage exceeds the capacitor voltage. This occurs near the line voltage peak and results in a high charge current spike, Figure 14. Since power is only taken near the line voltage peaks, the resulting spikes of current are extremely nonsinusoidal with a high content of harmonics. This results in a poor power factor condition where the apparent input power is much higher than the real power. Power factor ratios of 0.5 to 0.7 are common.
Vpk Rectified DC 0 Line Sag AC Line Voltage 0 AC Line Current
An Error Amplifier with access to the inverting input and output is provided. The amplifier is a transconductance type, meaning that it has high output impedance with controlled voltage-to-current gain (gm 50 mhos). The noninverting input is internally biased at 5.0 V 2.0%. The output voltage of the power factor converter is typically divided down and monitored by the inverting input. The maximum input bias current is -1.0 A which can cause an output voltage error that is equal to the product of the input bias current and the value of the upper divider resistor R2. The Error Amplifier output is internally connected to the Multiplier and is pinned out (Pin 4) for external loop compensation. Typically, the bandwidth is set below 20 Hz so that the amplifier's output voltage is relatively constant over a given ac line cycle. In effect, the error amplifier monitors the average output voltage of the converter over several line cycles resulting in a fixed Drive Output on-time. The amplifier output stage can sink and source 11.5 A of current and is capable of swinging from 1.7 to 5.0 V, assuring that the Multiplier can be driven over its entire dynamic range. Note that by using a transconductance type amplifier, the input is allowed to move independently with respect to the output, since the compensation capacitor is connected to ground. This allows dual usage of the Voltage Feedback pin by the Error Amplifier and Overvoltage Comparator.
Overvoltage Comparator
Figure 14. Uncorrected Power Factor Input Waveforms
Power factor correction can be achieved with the use of either a passive or active input circuit. Passive circuits usually contain a combination of large capacitors, inductors, and rectifiers that operate at the ac line frequency. Active circuits incorporate some form of a high frequency switching converter for the power processing with the boost converter being the most popular topology. Since active
An Overvoltage Comparator is incorporated to eliminate the possibility of runaway output voltage. This condition can occur during initial startup, sudden load removal, or during output arcing and is the result of the low bandwidth that must be used in the Error Amplifier control loop. The Overvoltage Comparator monitors the peak output voltage of the converter, and when exceeded, immediately terminates MOSFET switching. The comparator threshold is internally set to 1.08 Vref. In order to prevent false tripping during normal operation, the value of the output filter capacitor C3 must be large enough to keep the peak-to-peak ripple less than 16% of the average dc output.
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MC33368
Multiplier
A single quadrant, two input multiplier is the critical element that enables this device to control power factor. The ac haversines are monitored at Pin 5 with respect to ground while the Error Amplifier output at Pin 4 is monitored with respect to the Voltage Feedback Input threshold. A graph of the Multiplier transfer curve is shown in Figure 1. Note that both inputs are extremely linear over a wide dynamic range, 0 to 3.2 V for Pin 5 and 2.5 to 4.0 V for Pin 4. The Multiplier output controls the Current Sense Comparator threshold as the ac voltage traverses sinusoidally from zero to peak line. This has the effect of forcing the MOSFET on-time to track the input line voltage, thus making the preconverter load appear to be resistive.
Pin 6 Threshold
Sense Comparator threshold will be internally clamped to 1.5 V. Therefore, the maximum peak switch current is:
I pk(max)
+ 1.5 V R7
With the component values shown in Figure 15, the Current Sense Comparator threshold, at the peak of the haversine, varies from 110 mV at 90 Vac to 100 mV at 268 Vac. The Current Sense Input to Drive Output propagation delay is typically 200 ns.
Timer
[ 0.55
V
Pin 4
-V
Pin 3
V
Pin 5
Zero Current Detector
A watchdog timer function was added to the IC to eliminate the need for an external oscillator when used in stand alone applications. The Timer provides a means to automatically start or restart the preconverter if the Drive Output has been off for more than 385 s after the inductor current reaches zero.
Undervoltage Lockout and Quickstart
The MC33368 operates as a critical conduction current mode controller, whereby output switch conduction is initiated by the Zero Current Detector and terminated when the peak inductor current reaches the threshold level established by the Multiplier output. The Zero Current Detector initiates the next on-time by setting the RS Latch at the instant the inductor current reaches zero. This critical conduction mode of operation has two significant benefits. First, since the MOSFET cannot turn-on until the inductor current reaches zero, the output rectifier's reverse recovery time becomes less critical allowing the use of an inexpensive rectifier. Second, since there are no deadtime gaps between cycles, the ac line current is continuous thus limiting the peak switch to twice the average input current The Zero Current Detector indirectly senses the inductor current by monitoring when the auxiliary winding voltage falls below 1.2 V. To prevent false tripping, 200 mV of hysteresis is provided. The Zero Current Detector input is internally protected by two clamps. The upper 10 V clamp prevents input overvoltage breakdown while the lower -0.7 V clamp prevents substrate injection. An external resistor must be used in series with the auxiliary winding to limit the current through the clamps to 5.0 mA or less.
Current Sense Comparator and RS Latch
The MC33368 has a 5.0 V internal reference brought out to Pin 1 and capable of sourcing 10 mA typically. It also contains an Undervoltage Lockout (UVLO) circuit which suppresses the Gate output at Pin 11 if the VCC supply voltage drops below 8.5 V typical. A Quickstart circuit has been incorporated to optimize converter startup. During initial startup, compensation capacitor C1 will be discharged, holding the Error Amplifier output below the Multiplier's threshold. This will prevent Drive Output switching and delay bootstraping of capacitor C4 by diode D6. If Pin 4 does not reach the multiplier threshold before C4 discharges below the lower SMPS UVLO threshold, the converter will hiccup and experience a significant startup delay. The Quickstart circuit is designed to precharge C1 to 1.7 V. This level is slightly below the Pin 4 Multiplier threshold, allowing immediate Drive Output switching.
Restart Delay
The Current Sense Comparator RS Latch configuration used ensures that only a single pulse appears at the Drive Output during a given cycle. The inductor current is converted to a voltage by inserting a ground-referenced sense resistor R7 in series with the source of output switch. This voltage is monitored by the Current Sense Input and compared to a level derived from the Multiplier output. The peak inductor current under normal operating conditions is controlled by the threshold voltage of Pin 6 where:
I pk
+ Pin 6 Threshold R7
Abnormal operating conditions occur when the preconverter is running at extremely low line or if output voltage sensing is lost. Under these conditions, the Current
A restart delay pin is provided to allow hiccup mode fault protection in case of a short circuit condition and to prevent the SMPS from repeatedly trying to restart after the input line voltage has been removed. When power is first applied, there is no startup delay, but subsequent cycling of the VCC voltage will result in delay times that are programmed by an external resistor and capacitor. The Restart Delay, Pin 2, is a high impedance, so that an external capacitor can provide delay times as long as several seconds. If the SMPS output is short circuited, the transformer winding, which provides the VCC voltage to the control IC and the MC33368, will be unable to sustain VCC to the control circuits. The restart delay capacitor at Pin 2 of the MC33368 prevents the high voltage startup transistor within the IC from maintaining the voltage on C4. After VCC drops below the UVLO threshold in the SMPS, the SMPS switching transistors are held off for the time programmed by the values of the restart capacitor (C9) and resistor (R8). In this manner, the SMPS switching transistors are operated
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MC33368
at very low duty cycles, preventing their destruction. If the short circuit fault is removed, the power supply system will turn on by itself in a normal startup mode after the restart delay has timed out.
Output Switching Frequency Clamp
In normal operation, the MC33368 operates the boost inductor in the critical mode. That is, the inductor current ramps to a peak value, ramps down to zero, then immediately begins ramping positive again. The peak current is programmed by the multiplier output within the IC. As the input voltage haversine declines to near zero, the output switch on-time becomes constant, rather than going to zero because of the small integrated dc voltage at Pin 5 caused by C2, R3 and R5. Because of this, the average line current does not exactly follow the line voltage near the zero crossings. The Output Switching Frequency Clamp remedies this situation to improve power factor and minimize EMI generated in this operating region. The values of R10 and C7, as shown in Figure 15, program a minimum off-time in the frequency clamp which overrides the zero current detect signal, forcing a minimum off-time. This allows discontinuous conduction operation of the boost inductor in the zero crossing region, and the average line current more nearly follows the voltage. The Output Switching Frequency Clamp function can be disabled by connecting the FC input, Pin 13, to the VCC supply Pin 12.
For best results, the minimum off-time, determined by the values of R10 and C7, should be chosen so that ts(min) = t(on) + t(off)fc. Output drive is inhibited when the voltage at the frequency clamp input is less than 2.0 V. When the output drive is high, C7 is discharged through an internal 100 A current source. When the output drive switches low, C7 is charged through R10. The drive output is inhibited until the voltage across C7 reaches 2.0 V, establishing a minimum off-time where:
t
(off)fc
+ * R10 C7 loge
1
*
2 V CC
Output
The IC contains a CMOS output driver that was specifically designed for direct drive of power MOSFETs. The Gate Output is capable of up to 1500 mA peak current with a typical rise and fall time of 50 ns with a 1.0 nF load. Additional internal circuitry has been added to keep the Gate Output in a sinking mode whenever the Undervoltage Lockout is active. This characteristic eliminates the need for an external gate pull-down resistor. The totem-pole output has been optimized to minimize cross-conduction current during high speed operation.
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MC33368
Table 1. Design Equations
Calculation Converter Output Power Peak Indicator Current I Inductance L Switch On-Time t (on) L(pk) V P Formula O
+ VO IO
(LL)
Notes Calculate the maximum required output power. Calculated at the minimum required ac line voltage for output regulation. Let the efficiency = 0.92 for low line operation. 2 Let the switching cycle t = 40 s for universal input (85 to 265 Vac) operation and 20 s for fixed input (92 to 138 Vac, or 184 to 276 Vac) operation.
2 + h2Vac PO
+ P
t
O -Vac (LL) 2 2V
h
Vac
(LL)
P OO In theory, the on-time t(on) is constant. In practice, t(on) tends to increase at the ac line zero crossings due to the charge on capacitor C5. Let Vac = Vac(LL) for initial t(on) and t(off) calculations. The off-time t(off) is greatest at the peak of the ac line voltage and approaches zero at the ac line zero crossings. Theta () represents the angle of the ac line voltage. The off-time is at a minimum at ac line crossings. This equation is used to calculate t(off) as Theta approaches zero. The delay time is used to override the minimum off-time at the ac line zero crossings by programming the Frequency Clamp with C7 and R10. The minimum switching frequency occurs at the peak of the ac line voltage. As the ac line voltage traverses from peak to zero, t(off) approaches zero producing an increase in switching frequency. Set the current sense threshold VCS to 1.0 V for universal input (85 to 265 Vac) operation and to 0.5 V for fixed input (92 to 138 Vac, or 184 to 276 Vac) operation. Note that VCS must be less than 1.4 V. 2 Set the multiplier input voltage VM to 3.0 V at high line. Empirically adjust VM for the lowest distortion over the ac line voltage range while guaranteeing startup at minimum line. IB R1 The IIB R1 error term can be minimized with a divider current in excess of 100 A. The calculated peak-to-peak ripple must be less than 16% of the average dc output voltage to prevent false tripping of the Overvoltage Comparator. Refer to the Overvoltage Comparator Text. ESR is the equivalent series resistance of C3. The bandwidth is typically set to 20 Hz. When operating at high ac line, the value of C1 may need to be increased.
+
2P
h
t V
L OP Vac 2
Switch Off-Time t (off)
+
(on) -1
O 2 Vac Sin q
Minimum Switch Off-Time Delay Time t Switching Frequency
t
(off)
min
+
L
I P L(pk) V O V -2 CC V CC
+ - R10 C7 ln d
f
+t
R7
(on)
) t(off)
V CS L(pk)
1
Peak Switch Current
+I
Multiplier Input Voltage V
+ M
Vac R5 R3 R2 R1
)1
-I
Converter Output Voltage Converter Output Peak-to-Peak Ripple Voltage
V
O
+ Vref
)1
p
DVO(pp) + IL(pk)
2 2 1 f ac C3
) ESR2
Error Amplifier Bandwidth
BW
+ 2 gmC1 p
NOTE: The following converter characteristics must be chosen: VO = Desired output voltage. Vac(LL) = AC RMS minimum required operating line voltage for output regulation. IO = Desired output current. VO = Converter output peak-to-peak ripple voltage. Vac = AC RMS operating line voltage.
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MC33368
1N4006 D4
D2 92 to 270 Vrms EMI Filter
C5 1.0
D1
D3
16 Vref Vref R8 10 k C9 330 F 15 V RD 2 AGnd 8 1.5 V Q Timer R UVLO Zero Current Detect 1.2/1.0
Line
MC33368
D6 D8 R13 VCC 1N4744 51 1N4934 12 13/8.0 7 15 V ZCD Gate 11 PGnd 10 R11 10 To VCC Pin 12 R10 10 C7 10 pF Q1 R4 22 k T 320 H MUR130 D5 C3 220 MTP8N50E R2 470 k VO C4 100
RS Latch R R S S Q S Set Dominant Overvoltage Comparator
R5 1.3 M Low Load Detect 1.08 x Vref Frequency Clamp
13 FC 9 LEB 6 CS
Quickstart Leading Edge Blanking Mult 5 R3 20 k C2 0.01 Multiplier 4 Comp C1 0.68 1 Vref C6 0.1 Vref 5.0 V Reference 3 FB
R7 0.1 0.25 W
T: Coilcraft N2881-A Primary = 62 turns of #22 AWG Secondary = 5 turns of #22 AWG Core = Coilcraft PT2510, EE25 Gap = 0.072 total for a primary inductance (Lp) of 320 H
Not Used: D7, C8, R6, R9
R1 10 k
Power Factor Controller Test Data
AC Line Input Vrms 90 100 110 120 130 138 Pin 79.7 79.3 78.9 78.5 78.1 77.8 PF 0.999 0.998 0.997 0.996 0.994 0.991 Ifund 0.89 0.79 0.72 0.66 0.60 0.57 Current Harmonic Distortion (% Ifund) THD 2 3 5 7 0.5 0.5 0.5 0.5 0.5 0.5 0.15 0.14 0.16 0.15 0.14 0.15 0.09 0.09 0.13 0.12 0.12 0.14 0.06 0.08 0.08 0.08 0.07 0.08 0.09 0.10 0.10 0.13 0.14 0.14 VO(pp) 3.0 3.0 3.0 3.0 3.0 3.0 DC Output
VO 244.4 242.9 242.9 243.0 243.0 243.0
IO 0.31 0.31 0.31 0.31 0.31 0.31
PO 76.01 75.54 75.30 75.57 75.57 75.57
n(%) 95.4 95.3 95.4 96.3 96.7 97.1
Heatsink = AAVID Engineering Inc., 590302B03600, or 593002B03400
Figure 15. 80 W Power Factor Controller http://onsemi.com
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MC33368
1N5406 D2 92 to 270 Vrms EMI Filter D1 D4 D3
C5 1.0
16 Vref Vref R8 1.0 M C9 2.2 15 V RD 2 AGnd 8 1.5 V Q Timer R UVLO Zero Current Detect 1.2/1.0
Line
MC33368
D8 R13 D6 VCC 1N4744 51 1N4934 12 13/8.0 6.9 V C4 100 T MUR460 R11 10 To VCC Pin 12 Q1 D5 C3 330 MTW20N50E R2 820 k VO
RS Latch R R S S Q S Set Dominant Overvoltage Comparator
7 15 V ZCD R4 22 k Gate 11 PGnd 10
R5 1.3 M Low Load Detect 1.08 x Vref Frequency Clamp
13 FC 9 LEB 6 CS R7 0.1
Quickstart Leading Edge Blanking Mult 5 R3 10 k C2 0.01 Multiplier 4 Comp C1 2.2 1 Vref C6 0.1 Vref 5.0 V Reference 3 FB
Not Used: D7, C7, C8, R6, R9, R10
T: Coilcraft N2880-A L = 870 Hy Primary: 78 turns of #16 AWG Secondary: 6 turns of #18 AWG Core: Coilcraft PT4215, EE42-15 Gap: 0.104 total
R1 10 k
Power Factor Controller Test Data
AC Line Input Current Harmonic Distortion (% Ifund) Vrms 90 120 138 180 240 268 Pin PF Ifund 2.11 1.60 1.40 1.08 0.80 0.71 THD 5.8 3.2 0.9 0.9 0.7 0.6 2 0.16 0.08 0.08 0.04 0.08 0.11 3 0.32 0.17 0.24 0.18 0.21 0.32 5 0.24 0.07 0.03 0.04 0.08 0.10 7 0.80 0.30 0.15 0.08 0.06 0.10 VO(pp) 3.6 3.6 3.6 3.6 3.6 3.6 VO 398.0 398.9 402.3 409.1 407.0 406.2 IO 0.44 0.44 0.45 0.45 0.45 0.44 PO 175.9 177.1 179.0 182.9 181.1 180.4 n(%) 92.4 92.2 92.9 94.1 95.7 96.8 DC Output
190.4 0.995 192.1 0.997 192.7 0.997 194.3 0.995 189.3 0.983 186.3 0.972
Heatsink = AAVID Engineering Inc., 590302B03600
Figure 16. 175 W Universal Input Power Factor Controller http://onsemi.com
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MC33368
2X Step-up Isolation Transformer
EMI Filter AC Power Analyzer PM 1000
Line
Autoformer
HI W VA PF Vrms Arms A VD Acf Ainst Freq HARM
HI 0.1 V
T
115 Vrms Input 1 Neutral 0
0 to 270 Vac 1.0 Output to Power Factor Correction Circuit
L.O.
L.O. Voltech
An RFI filter is required for best performance when connecting the preconverter directly to the ac line. The filter attenuates the level of high frequency switching that appears on the ac line current waveform. Figures 15 and 16 work well with commercially available two stage filters such as the Delta Electronics 03DPCG6. Shown above is a single stage test filter that can easily be constructed with four ac line rated capacitors and a common-mode transformer. Coilcraft CMT3-28-2 was used to test Figures 15 and 16. It has a minimum inductance of 28 mH and a maximum current rating of 2.0 A. Coilcraft CMT4-17-9 was used to test Figure 19. It has a minimum inductance of 17 mH and a maximum current rating of 9.0 A. Circuit conversion efficiency (%) was calculated without the power loss of the RFI filter.
Figure 17. Power Factor Test Setup
D2 92 to 270 Vrms EMI Filter D1
D4 D3
C5 1.0
16 Vref R8 10 k RD C9 330 F 2 AGnd 8 1N4148 1.5 V Q Timer R Vref
Line
MC33368 15 V UVLO Zero Current Detect 1.2/1.0 13/8.0 6.9 V R13 51 D6 C4 100 T DC Out C3 330 MTW14N50E R2 820 k
VCC D8 12
On/Off Input 5.0 V 0V Off On R5 1.3 M Low Load Detect
RS Latch R R S S Q S Set Dominant Overvoltage Comparator
7 15 V ZCD R4 22 k Gate 11 PGnd 10 13 FC 9 LEB 6 CS R11 10
Q1
D5
Frequency Clamp 1.08 x Vref Quickstart Leading Edge Blanking
Mult 5 R3 10 k C2 0.01 Multiplier 4 Comp C1 22 1.0 k 2N3904 1.0 k 1 Vref C6 0.1 Vref 5.0 V Reference VCC 10 k 3 FB
R7 0.1
R1 10 k
Figure 18. On/Off Control http://onsemi.com
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MC33368
1N5406 D4 D3 C5 1.0
D2 92 to 270 Vac EMI Filter D1
16 Vref R8 1.0 M RD C9 330 F 2 AGnd 8 1.5 V Q Timer R Vref
Line
MC33368 15 V UVLO Zero Current Detect 1.2/1.0 13/8.0 1.5 V R13 51 D6 C4 100 T MUR460 D5 Q1 R11 10 PGnd 10 Low Load Detect 1.08 x Vref Frequency Clamp 13 FC 9 LEB 6 CS C8 0.001 R10 10 k C7 470 pF R9 10 R7 0.1 Vref C3 400 V 330 MTW20N50E R2 820 k
1N4744 VCC D8 12
1N4934
RS Latch R R S S Q S Set Dominant Overvoltage Comparator
7 15 V ZCD R4 22 k Gate 11
R5 1.3 M
Quickstart Leading Edge Blanking Mult 5 R3 10.5 k C2 0.01 Multiplier 4 Comp C1 1.0 1 Vref C6 0.1 Vref 5.0 V Reference 3 FB
R1 10 k
Figure 19. 400 W Power Factor Controller
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MC33368
DC Output C6 D7 R2 R1 R8 C9 C7 R10 J C1 R4 IC1 C8 J R13 R11 J D6 R5 R6 D2 R7 R3 C2 D1
D3 AC Input C5
D4 C4
C3
J = Jumper
3.0
Figure 20. Printed Circuit Board and Component Layout (Circuits of Figures 15 and 16)
IIIIII IIII IIIIII IIIIII IIIIII IIIIII
J R9 Q1 S D G D5 (Top View) 4.5 (Bottom View) 15
Transformer
D8
MC33368
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MC33368
PACKAGE DIMENSIONS
DIP-16 P SUFFIX CASE 648-08 ISSUE R
-A-
16 9
B
1 8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL.
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
DIM A B C D F G H J K L M S
INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040
MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
SO-16 D SUFFIX CASE 751K-01 ISSUE O
-A-
16 9
0.25 (0.010)
-B-
P
M_ F
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.368 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
1
8
G R X 45 _ C -T- K
14 X D SEATING PLANE
M
B
S
J
M
0.25 (0.010)
TA
S
B
S
DIM A B C D F G J K M P R
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MC33368
Notes
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MC33368
Notes
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MC33368
Notes
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MC33368
GreenLine is a trademark of Motorola, Inc.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local Sales Representative.
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MC33368/D

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